The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed.
In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. One example of an IC device that has experienced such scaling down is a transistor (e.g., a metal-oxide-semiconductor field-effect-transistor (MOSFET)). To enhance performance of transistors, strain is often introduced into the transistor channel for improving mobility enhancement. Strain may be introduced by having an IC device comprising a silicon substrate and SiGe source/drain regions. The SiGe source/drain regions introduce strain into a silicon channel. Typically, the SiGe source/drain regions are formed in the silicon substrate, and then, the device is subjected to one or more implantation processes. It has been observed that the subsequent implantation processes cause relaxation of the SiGe induced stress. Further, defects arising at the substrate/SiGe source/drain region interface increase short channel effects by enhancing diffusion.
Accordingly, what is needed are semiconductor devices that address the above stated issues, and methods for making such integrated circuit devices.